Multi-touch panels of the analog resistive film type are widely adopted in handheld terminals such as PDAs, OA equipment such as copiers and fax machines, mobile phones, handheld video game machines, vehicle navigation systems, small PCs, and various types of home electrical appliances.
FIG. 13 shows an ordinary configuration of a multi-touch panel of this type.
A multi-touch panel 50 shown in this figure includes a lower electrode plate 51 and an upper electrode plate 52 that are provided to face each other, and an insulating adhesive layer 53 (see FIG. 14) which joins peripheral portions of the lower electrode plate 51 and the upper electrode plate 52.
The lower electrode plate 51 has a transparent insulating substrate 51 a such as a glass plate, ITO (indium tin oxide) electrodes 51b that are formed on the transparent insulating substrate 51a, and a plurality of paired parallel circuits 51c to 51f that are provided respectively at ends in an X-X′ direction of the ITO electrodes 51b. It is noted that parallel circuit referred to in this specification is made by an electrode connected with the ITO strip electrode as shown in FIGS. 1(a) to 6 and FIG. 13.
The upper electrode plate 52, which is to be touched, has a flexible transparent insulating base material 52a such as a polyester film, ITO electrodes 52b that are formed on a lower surface of the flexible transparent insulating base material 52a, and a plurality of paired parallel circuits 52c to 52g that are provided respectively at ends in a Y-Y′ direction of the ITO electrodes 52b. 
It is noted that FIG. 13 shows a state where distances between the adjacent parallel circuits are enlarged for the purpose of understanding easier the locations of the parallel circuits 51c to 51f and the parallel circuits 52c to 52g, while each of the actual distances between the adjacent parallel circuits is approximately 0.2 mm.
In the lower electrode plate 51, the parallel circuits 51c to 51f and an FPC 54 functioning as an external terminal are connected to each other by wiring circuits 51g and 51h. In the upper electrode plate 52, the parallel circuits 52c to 52g and the FPC 54 are connected to each other by wiring circuits 52h and 52i (refer to Patent Document 1, for example). In the figures, reference signs a to e indicate input areas that are independent from each other.